A fully integrated, power-efficient, 0.07–2.08 mA, high-voltage neural stimulator in a standard CMOS process

This article belongs to the Special Issue Electrical Stimulation and Methods to Manipulate the Motor and Sensory System: Current Settings and Applications II.

Bibliographic Details
Authors: Palomeque-Mangut, David, Rodríguez-Vázquez, Ángel, Delgado-Restituto, Manuel
Format: article
Status:Published version
Publication Date:2022
Country:España
Institution:Consejo Superior de Investigaciones Científicas (CSIC)
Repository:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/336818
Online Access:http://hdl.handle.net/10261/336818
Access Level:Open access
Keyword:Neural stimulator
Dynamic gate biasing
Neuromodulation
Stacked transistors
Neural implants
CMOS
High voltage compliance
Charge pump
DC-DC converter
Description
Summary:This article belongs to the Special Issue Electrical Stimulation and Methods to Manipulate the Motor and Sensory System: Current Settings and Applications II.